The present invention relates generally to the field of reconfigurable devices. Complex printed circuit boards may have hundreds of components and thousands of different connections. Traditional test systems, such as external test probes or “bed of nails” test devices, cannot access the numerous test points on printed circuit boards with more than two layers or with advanced component mounting technologies, such as surface mount, ball grid array (BGA), pin grid array (PGA), or flip-chip mountings. In response to the need to test complex printed circuit boards, diagnostic interfaces began to be integrated into the components and printed circuit board design. One such diagnostic interface standard is a boundary scan testing interface known as IEEE Standard 1149.1, also referred to as JTAG.
Reconfigurable devices, such as programmable logic devices (PLDs), are often included in complicated systems. A PLD is typically composed of a number of functional blocks that use either a combination of logic gates or a look-up table to perform a logic operation. Functional blocks can also include specialized logic devices adapted to a specific logic operation. The functional blocks are interconnected with a configurable switching circuit. The configurable switching circuit establishes connections between the functional blocks, enabling the PLD to perform the intended functions. The configurable switching circuit also establishes connections between some of the functional blocks and the pins of the PLD, so that data can be input to and output from the PLD. The configuration of the switching circuit is determined according to the core configuration information, and the configuration of the PLD pins is determined according to I/O configuration information. The core configuration and I/O configuration information is loaded into the PLD or other reconfigurable device from a separate configuration device.
Testing systems with one or more reconfigurable devices introduces several difficulties. For complex configurations, the process of loading the configuration information into the reconfigurable device can take a long time. This delay makes fine-tuning or debugging a system time-consuming and inefficient, because the configuration information may have to be reloaded numerous times. This problem is exacerbated where the reconfigurable devices support multiple I/O standards for connecting with different variations of the system. In these situations, a complete set of configuration information needs to be loaded prior to testing for each supported I/O standard.
Further, a system cannot be tested until the configurations of the reconfigurable devices are finalized, even if the functions of the reconfigurable devices do not need to be tested. Additionally, a complex system may be distributed over several separate circuit boards. If the configuration device is on a different board than its associated reconfigurable devices, then the circuit boards cannot be tested separately. These factors prevent developers from testing portions of the system as they are completed, increasing the complexity and difficulty of the testing process.
A prior solution to these problems allows configuration information for the entire reconfigurable device to be loaded into the device via the device's diagnostic interface. This allows reconfigurable devices to be tested without a configuration device. However, diagnostic interfaces are typically much slower than the normal configuration connection. Therefore, testing and debugging consume an even greater amount of time. Additionally, when testing multiple I/O standards, this solution still requires a complete set of configuration information to be loaded for each I/O standard to be tested. Moreover, a system cannot be tested until the configurations of the reconfigurable devices are finalized.
This solution also introduces its own problems. Because configuration information is loaded into reconfigurable devices through the diagnostic interface, the testing equipment must have a complete and up to date set of configuration information. The testing equipment must also be able to coordinate the sequence of events needed to load the configuration information into a reconfigurable device. This greatly increases the complexity and expense of the testing equipment.
Following the completion of system testing, the system needs to be returned to its original state. This often includes reconfiguring the reconfigurable devices back to their initial configurations. This can be done by either resetting the entire system, or by loading the initial configurations into the reconfigurable devices via the diagnostic interface. These techniques are both time-consuming and difficult.
It is desirable to be able to: 1) quickly and efficiently test and debug systems having reconfigurable devices; 2) test reconfigurable devices with multiple I/O standards without having to load a complete set of configuration information; 3) test systems prior to finalizing the configuration of the reconfigurable devices; and 4) test circuit boards having reconfigurable devices separately even if the board does not include a reconfiguration device. Following the completion of testing, it is further desirable to be able to trigger the reconfiguration of a reconfigurable device through the diagnostic interface to return the reconfigurable device to its initial configuration.